Fanout clock buffers for low jitter, high frequency clock/data distribution.
- Output frequency up to 2.1 GHz
- Ultra-low output-to-output skew, as low as 30 ps (typical)
- Low additive jitter, 50 to 55 fs rms
- Low propagation delay, as low as <1.6 ns
- Wide voltage operation for design compatibility
- Output enable (OE) signal for output synchronization (SiT92112, SiT92114, SiT92216)
- Level translation