20 Output, DB2000QL Equivalent Clock Buffer with 85 Ω Terminations
LoginThe SiT92315 is a HCSL-LP, 20 output differential fanout clock buffer that meets or exceeds all the performance requirements of the Intel DB2000QL specification. This buffer is ideal for PCI-Express Gen 1 to Gen 6 or QP/UPI applications and comes in a compact LGA package with a standard pin configuration.
The SiT92315 offers three modes to control all the 20 outputs. They can be controlled either through the SMBus interface, the side band interface, or output enable pins.
"Specs" | "Value" |
---|---|
Operating Temperature Range (°C) | -40 to 85 |
Package Type (mm²) | 6x6 mm, 80-pin LGA |
Buffer Type | PCIe Fanout |
Number of Inputs | 1 |
Number of Outputs | 20 Differential |
Input Frequency Range | 1 Hz to 400 MHz |
Output Type | HCSL-LP |
Output Frequency Range | 1 Hz to 400 MHz |
Additive Phase Jitter (rms) | 8 fs (PCIe Gen6 @100 MHz) |
Propagation Delay, Typical | 0.75 ns |
Output-Output Skew, Typical | 50 ps |
PCIe Support | Gen 1 to Gen 6 |
Output Enable | Yes |
Availability | Contact SiTime |
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6x6 mm, 80-pin LGA Clock Buffer package
- HCSL-LP outputs with Zo = 85 Ω
- Saves power and board space - no termination resistors required
- Supports PCIe and QPI applications
- Spread spectrum compatible; tracks spreading input clock for low EMI
- Additive phase jitter
- Fclk=100 MHz (10k to20M) band ~ 42fs (Typical)
- Fclk=100 MHz after PCIE Gen5 (CC) filter ~10 fs RMS
- Fclk=100 MHz after PCIE Gen6 filter ~6 fs RMS
- Additive phase jitter after DB2000Q filter ~8 fs RMS (typical)
- Programmable output slew rate control
- Hardware-controlled low power mode (PDN)
- Current consumption: 150 mA typical with all 20 outputs enabled at 100 MHz, driving a 10 inch T line and 2 pF load on each output
- Microserver and Tower Server
- Rack Server
- Storage Area Network (SAN)
- Host Bus Adapters (HBA)
- Network Attached Storage (NAS)
- Solid-State Drives (SSD)
SiT92315 Evaluation Board HW User Manual – Configure and evaluate device performance
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