6 Output 1.8 V PCIE Fanout Buffer with 100 Ω Terminations
LoginThe SiT92316 family of parts are HCSL low-power (HCSL-LP), 6 output differential fanout buffers that meet or exceed all the performance requirements of the Intel DB800Z specification. They are suitable for PCI-Express Gen1 to Gen6 or QP/UPI applications.
The SMBus interface and multiple output-enable pins allow the configuration and control of all 6 outputs individually.
It is packaged in a compact VQFN package and uses a standard pin configuration.
"Specs" | "Value" |
---|---|
Operating Temperature Range (°C) | -40 to 85 |
Package Type (mm²) | 5x5 mm, 40-pin VQFN |
Buffer Type | PCIe Fanout |
Number of Inputs | 1 |
Number of Outputs | 6 Differential |
Input Type | HCSL |
Input Frequency Range | 1 Hz to 400 MHz |
Output Type | HCSL-LP |
Output Frequency Range | 1 Hz to 400 MHz |
Additive Phase Jitter (rms) | 8 fs (PCIe Gen6 @100 MHz) |
Propagation Delay, Typical | 0.75 ns |
Output-Output Skew, Typical | 50 ps |
PCIe Support | Gen 1 to Gen 6 |
Output Enable | Yes |
Availability | Contact SiTime |
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5x5 mm, 40-pin QFN Clock Buffer package
- HCSL-LP outputs with Zo = 100 Ω
- Saves power and board space - no termination resistors required
- Supports PCIe and QPI applications
- Spread spectrum compatible; tracks spreading input clock for low EMI
- Additive phase jitter
- Fclk=100 MHz (10k-20M) band ~ 50fs (Typical)
- Fclk=100 MHz after PCIE Gen5 (CC) filter ~12 fs RMS
- Fclk=100MHz after PCIE Gen6 filter ~8 fs RMS
- Additive phase jitter after DB800Z filter ~10 fs RMS (typical)
- Programmable output slew rate control
- Selectable SMBus address
- 1.8 V core and IO supply voltages
- Hardware-controlled low power mode (PDN)
- Current consumption: 50 mA Typical with all 8 outputs enabled at 100 MHz, driving a 5 inch T line and 2pF load on each output
- 3 Selectable SMBUS addresses
- Microserver and Tower Server
- Rack Server
- Storage Area Network (SAN)
- Host Bus Adapters (HBA)
- Network Attached Storage (NAS)
- Hardware Accelerator
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