Apr
25
2024
Product Spotlight: Synchronizing High-Speed Communication Systems with the Cascade Family of Jitter Cleaners
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pr@sitime.com
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| "Specs" | "Value" |
|---|---|
| Operating Temperature Range (°C) | -40 to 85 |
| Package Type (mm²) | 6x6 mm, 40-pin QFN |
| Buffer Type | Fanout |
| Number of Inputs | 3 |
| Number of Outputs | 8 Differential |
| Input Type | LVPECL, LVDS, LVCMOS, SSTL, HCSL |
| Input Frequency Range | 0 Hz to 2.1 GHz |
| Output Type | LVPECL, LVDS, HCSL, LVCMOS |
| Output Frequency Range | 0 Hz to 2.1 GHz |
| Additive Phase Jitter (rms) | 55 fs (typ.) |
| Propagation Delay, Typical | 1.4 ns |
| Output-Output Skew, Typical | 30 ps |
| Availability | Sampling |
Don’t waste time shipping samples. Request demo & test parts remotely in our lab and qualify for your design today.
We are ready to help you!
Please complete the form below and someone will contact you. Items notated with an * are required.
| "Specs" | "Value" |
|---|---|
| Operating Temperature Range (°C) | -40 to 85 |
| Package Type (mm²) | 6x6 mm, 36-pin QFN |
| Buffer Type | Fanout |
| Number of Inputs | 3 |
| Number of Outputs | 6 Differential |
| Input Type | LVPECL, LVDS, LVCMOS, SSTL, HCSL |
| Input Frequency Range | 0 Hz to 2.1 GHz |
| Output Type | LVPECL, LVDS, HCSL, LVCMOS |
| Output Frequency Range | 0 Hz to 2.1 GHz |
| Additive Phase Jitter (rms) | 55 fs (typ.) |
| Propagation Delay, Typical | 1.4 ns |
| Output-Output Skew, Typical | 30 ps |
| Availability | Sampling |
Apr
17
2024
SiTime Continues to Advance Precision Timing with an Integrated Clock Chip for AI Datacenters
Media Contact
pr@sitime.com
Mar
04
2024
New Ruggedized Timing Technology Addresses the Challenges of GPS-Synchronized Defense Equipment
Media Contact
pr@sitime.com