FPD-Link is a SerDes interface used for infotainment and ADAS applications, featuring advanced techniques to enable operation in harsh EMI environments. This link requires a reliable clock with well-controlled jitter. SiTime offers robust low-jitter clocks that meet FPD-Link IV jitter requirements with significant margin to support the reliable transfer of high-definition data over long distances and under rugged conditions.
Complete MEMS clock treeLow jitter oscillators Clock generators |
Most robust in real world conditions500 fs rms jitter Resistant to shock, vibration, EMI Stable over wide temperature |
Integrated MEMS, easy to useNo quartz reliability issues Reliable startup in cold temp 2.2 billion hours MTBF |
FPD-Link is a serializer/deserializer (SerDes) interface developed by Texas Instruments and is now commonly used for infotainment and ADAS applications. FPD-Link transmits high-definition video from cameras to ADAS computers, as well as from Infotainment systems to LCD displays. It features advanced techniques to enable long cables in harsh EMI environments.
FPD-Link requires a single-ended LVCMOS clock (called "PCLK") between 25 MHz and 100 MHz, provided by an oscillator such as SiT1625. Clock jitter must be well controlled. Excessive jitter on the clock "closes the eye diagram", resulting in increased bit error rate (BER) on the link.
For more details, please refer to the White Paper on FPD-Link Clocking.
Asynchronous mode represents the traditional way of driving serial data interfaces: both clock + data are provided at the input of the serializer. After transmission, both clock and data are recovered at the deserializer. Because multiple, independent links each run with its own independent clock, this mode is called asynchronous.
In synchronous mode, the clock is provided from an oscillator to the deserializer side of the FPD-Link. The clock is then transmitted "uplink" through the FPD-Link backchannel to the serializer. This mode is called synchronous because the link runs synchronously to the deserializer and multiple links are therefore synchronized. However, an extra step is required to synchronize multiple links: all deserializers clocks must have the same frequency and phase. A clock generator is the best device to achieve this, as described in the next section.
When multiple cameras (e.g., front left, front center, and front right of a vehicle) are synchronized, their frames are aligned. This reduces the need for a RAM buffer on the ADAS computer side, otherwise needed to re-align mismatched video frames.
Having all clocks at the same frequency and phase is a prerequisite for synchronizing multiple links. This is best achieved with a clock generator – see Fig. 3. SiTime automotive clock generators feature an integrated, high-reliability MEMS resonator. Multiple configurable output frequencies enable FPD-Links with different frequencies. The typical use case is multiple cameras having different resolutions. Advanced features for ADAS applications are available too. Please contact SiTime for information on the detailed feature set and product availability.
| Devices | Frequency | Key Features | Key Values |
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Low Power Oscillator
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44 standard frequencies incl. and |
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Clock Generator
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1 to 1000 MHz |
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1 12 kHz to 20 MHz integration range
All SiTime devices offer the following advantages over quartz crystals, which are particularly important for automotive applications.
Higher Quality |
Higher Reliability |
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