The Endura™ SiT9551 differential oscillator is ideal for FPGA clocking and other high-speed military applications requiring ultra-low jitter, low power, and small size.
This ruggedized oscillator offers 14 common frequencies from 25 MHz to 644.53125 MHz, 70 fs RMS jitter (typ.), and high temperature operation up to 125°C in a QFN package as small as 2.0 x 1.6 mm. The SiT9551 is subjected to SiTime’s Endura process flow to provide high reliability and environmental robustness. The jitter remains unchanged under vibration. The frequency stability is rated at 0.04 ppb/g under typical mechanical vibrations and the oscillator has excellent immunity to power supply noise.
The SiT9551 offers popular output drivers for LVPECL, LVDS, HCSL and low-power HCSL with integrated termination resistors. It also features a unique FlexSwing™ driver that performs like LVPECL but with independent control of VOH and VOL levels to simplify interfacing with chipsets having non-standard input-voltage requirements. The SiT9551 accepts power-supply voltages down to 1.8V for additional power savings.
"Specs" | "Value" |
---|---|
Frequency | 14 standard frequencies from 25 MHz to 644 MHz |
Frequency Stability (ppm) | ±20, ±50 |
Operating Temperature Range (°C) | -40 to 85, -40 to 105, -40 to 125, -55 to 125 |
Package Type (mm²) | 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5 |
Oscillator Type | XO-DE |
Phase Jitter (rms) | 70 fs |
Pin1 Feature | No Function, OE active high, OE active low |
Voltage Supply (V) | 1.8 ±5%, 2.5 ±10%, 3.3 ±10%, 2.25 to 3.63 , 1.71 to 3.63 |
Features | 0.04 ppb/g acceleration sensitivity for harsh environments |
Availability | Pre-production Sampling |
Image: 6-pin package, top & bottom
SiT9551 pin assignments
SiT9551 block diagram
Frequency Slope (dF/dT) Calculator – Calculate frequency slope over temperature
Jitter Calculator and Plots – Convert phase noise to phase jitter, find phase noise plots
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199 | --- | |
100-499 | --- | |
500-999 | --- | |
1,000-4,999 | --- | |
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