Fari Assaderaghi

Fari rejoined SiTime in 2020 where he leads all technology, engineering, and operations for the company. Throughout his career, Fari’s quest has been to identify disruptive ideas and technologies and spearhead their development for broad market adoption. Between 2012 and 2020, Fari was vice president, advanced technology development at TDK InvenSense and senior VP of innovation and advanced technologies at NXP. At NXP, he was responsible for technical roadmaps in technology areas covering analog/mixed signal/power, MEMS, computing, connectivity, and security.

From 2008 to 2012, Fari was senior VP of engineering and operations at SiTime, where he led the development and commercialization of MEMS-based timing. Prior to SiTime, he was responsible for high-speed data communication circuits and systems at Rambus, including the Terabyte/sec signaling initiative. From 1995 to 2001 he was with IBM TJ Watson Research Center where he contributed to development of the first commercial version of CMOS SOI for VLSI.

Fari has contributed to a wide technical area spanning semiconductor device physics, circuit design for analog and mixed-signal, MEMS, and security. He is on the IEEE North America and Europe Executive Committee and has served on the SRC Executive Committee. Fari has contributed to more than 100 technical papers, including the best paper at 2016 ISSCC. He has 102 issued patents. Fari earned his M.S. and Ph.D. degrees in Electrical Engineering from UC Berkeley in 1992 and 1994, respectively.