SiT95210

Low Jitter, Quad PLL, 4-output Clock Generator

The SiT95210 clock generator offers programmable quad fractional frequency translation-based jitter cleaning with flexible input to output frequency translation options. The ultra-high performance PLLs support up to 4 differential or 8 single-ended input clocks that are common for all 4 fractional translations and provide 4 clock outputs. The clock outputs can be derived from any of the 4 PLLs in a fully flexible manner. This device is fully programmable with the I2C/SPI interface or an on-chip one-time programmable (OTP) non-volatile memory for factory pre-programmed devices.

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"Specs"	"Value"
Operating Temperature Range (°C)	-40 to 85
Package Type (mm²)	7x7 mm, 44-pin QFN
Phase Jitter (rms)	85 fs typ.; 70 fs typ. (with MEMS oscillator)
Frequency Control DCO	0.001 ppt (all outputs)
Input Type	LVCMOS, LVDS, LVPECL, CML
Internal ZDB Mode	<0.5 ns input to output delay variation
Phase Control DCO	<1 ps (all outputs)
Programmability	NVM OTP, External EEPROM, Partial autonomous, SPI/I2C
Repeatable Input-Output Delay	±225 ps
Availability	Production