SiT3373AI-1E2-33EG720.000000
| Specs | Value |
|---|---|
| Device Type | Voltage Controlled Oscillators |
| Frequency |
720 MHz
|
| Frequency Stability (ppm) |
±25
|
| Operating Temp. Range (°C) |
-40 to 85
|
| Output Type |
LVPECL
|
| Supply Voltage (V) |
3.3
|
| Package Size (mm x mm) |
7.0x5.0
|
| Output Drive Strength* |
Default
|
| Feature Pin |
Output Enable
|
| Pull Range (PPM PR) |
±150
|
*See datasheet for details
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Image: SiT3373 6-pin package, top & bottom
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SiT3373 pin assignments
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SiT3373 block diagram
Exceptional dynamic performance in real-life operating conditions
- 0.23 ps jitter
- ±15 ppm
- 0.1% pull range linearity: Ensures best system performance in hostile environments
Same excellent phase noise under vibration
- Minimizes link and data loss in high-vibration environments
0.05 ps/mV power supply noise rejection (PSNR)
- Reduces BOM with simpler power supply design
3.0 x 2.5 mm package
- Enables small form-factor system with stringent jitter requirement
Flexible programmable features
- 220 to 725 MHz
- 2.25 to 3.63 V
- ±25 to ±3200 ppm pull range
- LVPECL, LVDS, HCSL: Customize oscillator specifications for optimal system performance
Superior reliability
- 1 billion hours MTBF
- Lifetime warranty: Reduces field failures due to clock components and the repair costs
- Cable Model Termination System (CMTS)
- SONET
- Telecom Equipment
- Wireless Base Stations
- Networked Video Systems & Digitizers
- Jitter Cleaners
- Instrumentation
- Networked Audio Systems
- FPGA Data Recovery
Evaluation Boards (Contact SiTime) – SiT6097 (3225) | SiT6085 (6085)
Frequency Slope (dF/dT) Calculator – Calculate frequency slope over temperature
Jitter Calculator and Plots – Convert phase noise to phase jitter, find phase noise plots
3225 6-Pins | 5032 6-Pins with CP | 7050 6-Pins with CP – Preview packages with QFN 3D step models
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