SiTime, Silicon MEMS Oscillators and Clock Generators

Silicon MEMS Timing Architecture

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A MEMS oscillator combines a MEMS resonator die with a programmable oscillator IC. Both die are mounted together through a stacked-die or flip-chip process and co-packaged in industry-standard plastic packages or chip-scale packaging.


TempFlat-architectureMEMS Oscillator Architecture with TempFlat Technology

As shown in the block diagram, a MEMS resonator is connected to the MEMS-specific circuit blocks on the analog oscillator IC and is driven through electrostatic excitation. A MEMS bias generator is used to bias the electrostatic transducers that are built in the MEMS die. The resonator sustaining circuit brings the resonator into mechanical oscillation.

The output frequency is configured through use of a Fractional-N phase locked loop (PLL) located on the analog oscillator die. In most families, the output drivers enable configurable drive strength for best matching of transmission line impedances and to reduce system EMI. On-chip one time programmable (OTP) memory is used to store the configuration parameters.

SiTime’s new TempFlat™ MEMS technology, first deployed in the SiT15xx 32 kHz families, reduces the need for temperature compensation. This simplifies the design of the analog oscillator IC, reduces system size and lowers power consumption. In some MEMS oscillator families, the functional blocks associated with temperature compensated can be eliminated (as shown in the diagram above). For precision timing applications (< ±25 PPM), SiTime’s ultra-performance XOs, differential XOs, VCXOs and TCXOs employ a temperature sensor and a temperature to digital converter (as shown below) which work with the Frac-N PLL to perform temperature compensation.

Temp-Compensation-architectureMEMS Oscillator Architecture with Temperature Compensation