SiTime, Silicon MEMS Oscillators and Clock Generators

SiTime CMOS Analog Design Manager

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The CMOS Engineering Manager will be responsible for building and leading Analog Design teams through the development of precision timing circuits, leveraging SiTime’s industry-leading MEMS technology, that span high-performance Networking and Communications Infrastructure market application requirements and ultra-low power mobile platforms including wearable devices.  The ideal candidate is a highly motivated, self-starting, hands-on manager adept at leading fast-moving Analog design engineering teams and possessing excellent technical, managerial, and communications skills.  The position will have significant exposure with opportunity for career growth.

Responsibilities:

  • Lead an IC Design team consisting of Analog design engineers and Custom Layout Designers to develop precision timing solutions that address high-performance and ultra-low power applications
  • Hands-on manager overseeing precision timing circuit architectures, transistor level design and simulations, project planning, team development and growth
  • Plan and execute on designs that address demanding frequency stability, phase noise and power consumption, silicon die area specifications
  • Ensure first-pass success on Analog CMOS circuit solutions, fully leveraging SiTime’s innovative MEMS technology offerings
  • Collaborate with Digital Design Engineers, CAD, Systems Engineering, ATE Engineering and Applications teams to design chips with DFT, DFM, achieve rapid silicon bring-up and fast time-to-production release
  • Deploy robust design methodology and ensure comprehensive design reviews
  • Recruit and build world-class Analog Design engineering team
  • Manage engineers to accomplish product performance, development schedule, and budget goals

 

Requirements:

A candidate with a demonstrated record of success and who has the following attributes:

  • Passionate, self-starter with strong commitment to flawless execution
  • Strong attention-to-detail, deploying robust design methodology and thorough design reviews
  • Proven track record of designing and producing (in high volume) profitable complex mixed-signal chips
  • Track record of planning and execution from Product Concept through Design Implementation, Tape-out, Sampling and production release
  • Proven track record at each stage of the following:
    • Circuit Architecture development and technical feasibility studies
    • Design partitioning for phase noise / power budgeting
    • Writing detailed block-level specifications
    • Detailed design and simulation of basic analog building blocks and one or more of the following: ADCs, DACs, Temperature Sensors,  PLL, high-speed op amps, band gaps
    • Experiential knowledge of ultra-low phase-noise design, power supply noise considerations, device matching, parasitic extraction, signal integrity, ESD
    • Supervision of layout and editing critical blocks
    • Chip level design and verification of complex mixed-signal chips
    • Chip validation, characterization, qualification, release to production
  • Recruiting, building, and leading teams
  • 7 -plus years of industry experience, either with a fabless semiconductor company or with a Tier-1 Integrated Analog IC company in full-custom Analog IC circuit design, developing:
    • Frequency References, Fractional-N PLLs, Amplifiers, Comparators, Voltage References, bias circuits, 
      Switched capacitor or sampling circuits, high performance ADC and DACs, Linear regulators
  • 3-plus years proven experience in a similar leadership role
  • Excellent written and verbal communications skills
  • Education: BSEE, MSEE preferred