SiTime, Silicon MEMS Oscillators and Clock Generators

Principal/Sr. Analog/Mixed-Signal Designer

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The successful candidate will be responsible for design of analog and mixed-signal circuits, meeting their architectural requirements and technical specifications. Depending on the level of responsibility, the candidate may also contribute to the architectural definition of these blocks, and also to the chip integration. The design engineer will perform the necessary calculations, design and verification simulations to ensure the block meets all its requirements (both at the schematic level, and post layout extraction), and DFT and DFM are fully considered. The candidate will work closely with the layout designers to ensure the layout is completed properly, using all best known methods. The designer will be responsible for proper documentation of assigned blocks, and for holding preliminary and final design reviews. The candidate will actively participate in the chip bring up, evaluation and characterization (with emphasis on owned blocks). The candidate will address questions and issues related to his/her blocks raised by other personnel, such as product, characterization, test, or application engineers.


  • MS with minimum of 3 years of experience or Ph.D., in Electrical Engineering


Core expertise in one of the following areas:

  • PLL (Sigma-Delta and LC)
  • ADC (preferably > 14 ENOB)
  • Temperature Sensor
  • Quartz or MEMS Oscillator
  • Sub-threshold circuits
  • Low noise regulator and bandgap
  • Knowledge of programming languages: Matlab, VerilogA, Oceanscript,
  • Ability to oversee circuit layout for critical blocks
  • Ability to perform noise analysis


Minimum education level required:

  • MS / MEng


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