Current Openings
SiTime seeks smart, motivated professionals to help develop and market the technology that will transform the timing industry. Once onboard, you will be part of our dedicated team working to deliver innovative solutions to the manufacturers and foundries that use our products.
If you are interested in and qualified for a career opportunity at SiTime, please send a copy of your resume to talent@sitimecorp.com. Include the job title in the subject field of your email.
SiTime is proud to be an Equal Opportunity Employer.
Product Marketing Manager
Product Marketing Manager will be responsible for managing the development and rollout lifecycle for new products for strategic customers, from product concept and initial product specification through product launch and general availability.
Responsibilities:
- Develop business cases for new products and participate in product and company strategy development
- Create detailed functional product requirements and high level marketing requirements
- Work with other internal and external stakeholders to validate and successfully negotiate business and technical requirements. Develop alternatives, resolve issues, overcome obstacles and continue to move the product development to the next stage.
- Develop processes and workflows as required
- Manage the rollout of new products to customers, sales channels and media, including development of competitive analysis, product positioning, pricing and selling proposition.
- Develop and deliver sales channel training and documentation
- Manage product lifecycles
Requirements:
- BSEE or a Bachelor's degree in business required. MBA is a plus.
- 5 years of semiconductor marketing, system timing design, and/or semiconductor applications experience is desired. Knowledge of PLLs and timing issues is preferred.
- Detailed knowledge of frequency issues such as phase noice, jitter, ppm error, and skew is a plus.
- Ability to travel up to 25%, including international
- “Can do” positive, enthusiastic attitude
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Senior PLL Design Engineer
Responsibilities:
- Architecture, modeling, trade-off analysis, design, implementation, verification, test development, and support of medium and high performance, low-power integer-N and fractional-N PLLs in a variety of CMOS process technologies for timing and RF applications.
- Leadership of PLL-related design activities.
- Specification and design of analog and mixed-signal circuit blocks to support these PLLs and SiTime products as needed. These blocks include phase-frequency detectors, charge pumps, loop filters, VCOs, dividers, resonator drive circuits, temperature sensors, bandgap references, bias distribution circuits, high voltage charge pumps, ADCs, SerDes circuits, and output drivers.
- Layout supervision of circuit blocks and floorplanning of PLLs, e.g. to minimize spurs.
- Documentation of circuits and products, e.g. specifications, timing diagrams, etc.
- Minimal travel may be required, typically for assessing customer technical requirements.
Requirements:
- Education: BSEE + 8 years experience, MSEE + 6 years experience, or PhD + 4 years experience.
- Extensive experience designing both integer-N and fraction-N PLLs from conceptualization, architecture, and modeling through test and characterization.
- Strong understanding of noise sources and trade-offs affecting PLL performance.
- Strong understanding VCO and PLL performance metrics such as bandwidth, stability, pulling, pushing, jitter transfer/peaking, jitter generation, phase noise, Q, etc.
- General analog and mixed-signal IC design experience (e.g. op-amps, bandgap references, regulators, charge pumps, ADC’s, biasing circuits, etc.).
- Ability to work independently and provide mentoring of more junior colleagues.
- Good written and oral communications skills.
Knowledge and skills preferred:
- Experience with analog, mixed-signal, and digital design approached from both continuous-time and discrete-time perspectives. Sigma-delta design experience and familiarity is especially valued.
- Familiarity with Cadence IC design tools (Spectre / Virtuoso), Verilog or VHDL, and MatLab.
- Experience designing in several different CMOS process technologies.
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Senior Mixed Signal Design Engineer
Responsibilities:
- Design, implementation, verification, and test of analog and mixed-signal circuit blocks in a variety of CMOS process technologies for timing and RF applications using MEMS-based resonators.
- These blocks include resonator drive circuits, amplifiers, temperature sensors, precision bandgap references, high voltage charge pumps, ADCs, DACs, PLLs (fractional-N and integer-N), sigma-delta modulators, etc.
- Strong understanding of analog performance metrics such as gain-bandwidth, stability, frequency response, INL, DNL, settling time, noise, phase noise, etc.
- Documentation of circuits and products, e.g. specifications, timing diagrams, etc.
- Layout supervision of circuit blocks.
- Minimal travel may be required.
Requirements:
- Education: BSEE + 6 years experience, MSEE + 4 years experience, or PhD + 2 years experience.
- Experience designing general analog and mixed-signal blocks (e.g. op-amps, bandgap references, regulators, charge pumps, ADCs, biasing circuits, oscillator circuits, PLL blocks, etc.).
- Good written and oral communications skills.
- Ability to work independently and as part of a team.
Knowledge and skills preferred:
- Experience with analog, mixed-signal, and digital design approached from both continuous-time and discrete-time perspectives. Sigma-delta design experience and familiarity is especially valued.
- Familiarity with Cadence IC design tools (Spectre / Virtuoso), Verilog or VHDL, and MatLab.
- Experience designing in several different CMOS process technologies.
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Senior Test Engineer
The Senior Test Engineer is responsible for the development and release of production test solutions for high-volume manufacturing of SiTime’s revolutionary timing products. SiTime’s growth is fueled by an exciting line of timing products, highlighted by programmable oscillators for general purpose timing of consumer electronic produces.
The candidate is responsible for development of high volume test applications and the selection of test/handling equipment that is suitable for cost effective high volume production.
Responsibilities:
- Develop mixed-signal finaltest methodology including test and trim
- Develop and document finaltest code and specifications
- Design and document testhardware such as fixtures and loadboards
- Determine repeatability andaccuracy of test systems
- Determine test limitsconsidering system and device requirements, and statistical analysis ofdata
- Manage all aspects ofdatafiles and datalogs
- Ensure effective and timelyrelease of test solutions to production
- Work closelywith Circuit and MEMS design groups to ensure devices are Designed forTest (DFT).
- Contribute to continuedimprovements in test/handling solutions, and identify future directions ofSiTime’s test methodologies and platforms
Requirements:
- BS desired, MS preferred in Electrical Engineering
- Minimum of 7 years of related experience
- Hands-on experience with high-volume production test development
- Hands-on knowledge of mixed-signal IC testers such as Credence ASL1k and Eagle Test Systems ETS-364
- Experience with design and fabrication of mixed-signal loadboards
- Exceptional programming skills using C/C++
- Experience with high volume production handling
- Strong communication and writing skills, and a desire to work in a fast-paced environment
Knowledge and skills preferred:
- Knowledge of timing-specific testing, such as time interval analyzer (TIA) and frequency counter
- Experience releasing test solutions to multiple locations worldwide
- Strong statistical analysis skills
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